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 DS2290
DS2290 T1 Isolation Stik
FEATURES
PIN ASSIGNMENT
* Protected interface for connecting equipment to T1
lines
* Provides 800 volts of surge protection and 1500 volts
of isolation
* Meets TR 62411 and T1.403-1989 for transmit pulse
characteristics
* Line build outs of 0, -7.5, and -15 dB * Companion to the DS2291 T1 Long Loop Stik * Connects to a standard 30-pin single in-line connector
* Compatible
Tranceivers
with the DS2180A and DS2141A T1
(ACTUAL SIZE)
DESCRIPTION
The DS2290 T1 Isolation Stik provides all the surge and isolation protection that is necessary to connect a piece of equipment to a T1 line. It offers a function similar to that provided by a Data Access Arrangement (DAA) when a modem is connected to a phone line. The DS2290 is FCC Part 68 pre-registered so the user can connect equipment to T1 lines without any further testing or qualification. It contains onboard waveshaping circuitry that creates transmit pulses meeting the latest T1 specifications including TR 62411 (Accunet* T1.5 Service Description and Interface Specifications, - December 1990) and T1.403-1989 (Carrier to Carrier Installation - DS1 Metallic Interface). Applications include Channel Service Units and similar equipment that requires a fully protected interface.
* Service mark of AT&T Communications
ISOLTATION/ SURGE PROTECTION
* Single +5V supply
TRANSMIT WAVE- SHAPING
* FCC Part 68 registered
VDD VDD LCLK LPOS LNEG TCLK TPOS TNEG LB NC LB2 LB1 LB0 TAIS B8ZS NC NC NC RX+ RX- NC GND GND NC RXTIP LPWR+ RXRING TXTIP LPWR- TXRING
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
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DS2290
OVERVIEW
The DS2290 contains all the isolation and surge protection required to connect equipment to T1 lines. The Isolation Stik has a receive and a transmit section. (See Figure 1.) In the receive section, inputs RXTIP and RXRING are connected directly to the receive T1 twisted pair. These inputs are terminated at 100 ohms. The T1 signal received at RXTIP and RXRING is coupled through a 2:1 transformer and presented at the RX+ and RX- outputs. See Figure 2. There is a full 1500 volts of isolation between the Network Side pins and the Customer Side pins. In the transmit section, data that is to be transmitted is sourced from either the TPOS and TNEG inputs or the LPOS and LNEG inputs. The Data Mux will transmit data at the TCLK rate from the TPOS and TNEG inputs if the LB pin is either tied low or left open. It will transmit data at the LCLK rate from the LPOS and LNEG inputs if the LB pin is tied high. In order to comply with the latest T1 standards, the clock presented at either TCLK or LCLK must be at a 1.544 MHz rate (32 ppm) and must not jitter beyond 0.05 unit intervals peak-to-peak (UIpp). TPOS and TNEG can be tied together if the source of the transmit data is in a NRZ format. The DS2290 will automatically sense that these inputs are tied together and will create a bipolar data stream from them. The same holds true for the LPOS and LNEG inputs. Data out of the Data Mux is passed to a B8ZS encoder and AIS generator. If the B8ZS pin is tied high, then the DS2290 will properly encode the transmit data stream for the B8ZS zero code suppression scheme. If the B8ZS pin is tied low or left open, the DS2290 will not encode the transmit data for B8ZS. Also, the DS2290 can be configured to transmit an AIS (Alarm Indication Sig-
nal). If the TAIS pin is tied high, the DS2290 will transmit an unframed, all ones signal at either the TCLK (LB=0 ) or LCLK (LB=1) rate. The data to be transmitted is fed to the line driver. The line driver creates the T1 pulse that will be transmitted. The line build out pins LB0 to LB2 select whether the output pulse level will be 0, -7.5, or -15 dB (see Table 3). If 0 dB of build out is selected, the output pulse will conform to the shape described in Figure 2. This pulse shape is congruent with the latest T1 specifications such as TR 62411 and T1.403-1989. If the -7.5 dB or -15 dB line build outs are selected, then the pulse shown in Figure 3 will be attenuated according to the transfer function as described in FCC Part 68, Subpart D. Once the T1 pulse has been created, it is then transmitted onto the transmit T1 twisted pair via the TTIP and TRING outputs. The DS2290 contains provisions for line powering. If the DS2290 is to be powered from the T1 line using a DC simplex power arrangement, then an external DC-to- DC converter can connected to the LPWR+ and LPWR- pins. Requirements for line powering are currently being relaxed and will be totally removed in the future. If the DS2290 is not line powered, the LPWR+ and LPWR- pins should be tied together. Figure 4 shows a typical application using the DS2290. The transmit and receive T1 twisted pairs are connected directly to the DS2290. The DS2291 T1 Long Loop Stik recovers clock and data from the protected signal provided by the Isolation Stik. The DS2180A T1 Transceiver frames to the recovered data and interfaces to the system backplane. The DS2250 Soft Microcontroller Stik is used to control and monitor the status of the other devices.
022798 2/9
NETWORK SIDE PINS RECEIVE SECTION
1500 VOLT ISOLATION CUSTOMER SIDE PINS
RXTIP(25)
DS2290 BLOCK DIAGRAM Figure 1
RX+(19)
RXRING(27)
P R O T E C T I O N I S O L A T I O N T E R M I N A T I O N
RX-(20)
LPWR+(26)
TAIS(14) B8ZS(15) LB(9) LCLK(3) LPOS(4) LNEG(5) PD PD PD PD PD PD LINE DRIVER B8ZS ENCODER AND AIS GENERATOR DATA MUX
LPWR-(29)
TXTIP(28)
TXRING(30)
P R O T E C T I O N I S O L A T I O N
TCLK(6) TPOS(7) TNEG(8)
TRANSMIT SECTION
VDD(1,2) GND(22,23)
PU
PU
PD
1500 VOLT ISOLATION LB0(13)
LB2(11)
LB1(12)
DS2290
022798 3/9
DS2290
DS2290 RECEIVE SECTION CIRCUITRY Figure 2
5 OHM RXTIP 23 OHMS 5 OHM RXRING 2:1 RX- RX+
OUTPUT PULSE TEMPLATE Figure 3
1.2 1.1 1.0 0.9 0.8 0.7 NORMALIZED AMPLITUDE 0.6 0.5 0.4 0.3 0.2 0.1 -0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -500 -400 -300 -200 -100 0 100 TIME (ns) 200 300 400 500 600 700
022798 4/9
DS2290
TYPICAL DS2290 APPLICATION Figure 4
LCLK LPOS LNEG
RX+ RX- DS2290 T1 ISOLATION Stik
RX+ RX- B8ZS BPV PCS DJA RST LCLK LNEG LPOS DS2291 T1 LONG LOOP Stik
RCLK RPOS RNEG
RCLK RPOS RNEG DS2180A T1 TRANSCEIVER
RSER
B8ZS LB2
LOCK RCL LB TSER RECEIVE T1 PAIR RXTIP RXRING LPWR- LPWR+ TXTIP TXRING TPOS TNEG TCLK LB0 LB1 TAIS LB TPOS TNEG TCLK
SERIAL PORT
TRANSMIT T1 PAIR
DS2250 SOFT MICROCONTROLLER Stik
NETWORK SIDE PIN DESCRIPTION Table 1
PIN 25 27 28 30 26 29 SYMBOL RXTIP RXRING TXTIP TXRING LPWR+ LPWR- I/O I DESCRIPTION Receive Tip and Ring Inputs. Connects directly to the receive T1 twisted pair. These inputs are transformer coupled and terminated at 100 ohms. See Figure 2. Transmit Tip and Ring Outputs. Connects directly to the transmit T1 twisted pair. Output signal level is programmable via the LB0 to LB2 pins. (See Table 3.) Loop Power Connections. These pins connect to the internal center-taps of the transmit and receive transformers. They provide access to the DC power on the T1 line (may not be provided by carriers in the future). Tie together if no simplex power arrangement is needed.
O -
022798 5/9
DS2290
CUSTOMER SIDE PIN DESCRIPTION Table 2
PIN 1,2 3 4 5 6 7 8 9 SYMBOL VDD LCLK LPOS LNEG TCLK TPOS TNEG LB I/O - I I I I Positive Supply. 5.0 Volts. Loopback Clock. Clock for loopback data. Internally pulled low by 100K. Loopback Bipolar Data. Sampled on the falling edge of LCLK if LB is tied high. Internally pulled low by 100K. Transmit Clock. Apply a 1.544 MHz (32 ppm) clock here. Transmit Bipolar Data. Data that is to be transmitted. Sampled on the falling edge of TCLK when LB is tied low or left open. TPOS and TNEG can be tied together for an NRZ data input. Loopback Enable. Tie high to transmit data from LPOS and LNEG; tie low or leave open to transmit data from TPOS and TNEG. Internally pulled low by 100K ohm. Line Build Out Select. State determines whether the transmitted signal has 0, -7.5, or -15 dB of line build out. See Table 3. LB0 and LB1 are internally pulled high by 100K; LB2 is pulled low by 100K. If all three build out pins are left open, the default state is 0 dB. Transmit Alarm Indication Signal. Tie high to transmit an unframed all ones signal at either the TCLK (LB=0) or LCLK (LB=1) rate. Internally pulled low by 100K. B8ZS Enable. Tie high to enable B8ZS encoding; tie low or leave open to disable B8ZS encoding. Internally pulled low by 100K. Receive Analog Output. Protected differential T1 signal output here. Ground. 0.0 volts. DESCRIPTION
I
11 12 13 14
LB2 LB1 LB0 TAIS
I
I
15 19 20 22,23
B8ZS RX+ RX- GND
I O -
NOTE: Do not connect any signal to pins 10, 16, 17, 18, 21, and 24.
LINE BUILD OUT SELECTS Table 3
LINE BUILD OUT SELECTS 0 dB -7.5 dB -15 dB LB0 1 1 0 LB1 1 0 1 LB2 0 0 0
SINGLE IN-LINE CONNECTOR
The DS2290 is designed to connect directly into a 30-position single in-line connector. These connectors are available from a number of vendors.
022798 6/9
DS2290
ABSOLUTE MAXIMUM RATINGS*
Voltage on any Pin Relative to Ground (Customer Side pins only) Operating Temperature Storage Temperature -0.3V to VCC + 0.3V 0C to 70C -55C to +125C
* This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Logic 1 Logic 0 Supply SYMBOL VIH VIL VDD MIN 2.0 -0.3 4.75 TYP MAX VCC+0.3 +0.8 5.25 UNITS V V V
(0C to 70C)
NOTES 3 3
CAPACITANCE
PARAMETER Output Capacitance Output Capacitance SYMBOL CIN COUT MIN TYP 30 50 MAX UNITS pF pF
(tA=25C)
NOTES 3 3
DC ELECTRICAL CHARACTERISTICS
PARAMETER Supply Current Input Leakage Output Current (2.4V) Output Current (0.4V) SYMBOL IDD II IOH IOL -100 -1.0 +4.0 MIN TYP 60
(0C to 70C; VDD=5V 5%)
MAX 80 +100 UNITS mA A mA mA NOTES 1 2,3 3 3
NOTES:
1. TCLK = 1.544 MHz; VDD = 5.25V; outputs open; driving all ones into 6000 feet of 22 AWG. 2. VSS < VIN < VDD. 3. Does not apply to any of the network side pins nor RX+ or RX-.
022798 7/9
DS2290
ANALOG ELECTRICAL CHARACTERISTICS
PARAMETER Input Impedance at RXTIP and RXRING at 772 KHz Transmit Jitter Generation Transmit Pulse Amplitude Pulse Width Balance @ 50% Pulse Amplitude Balance Power Level at 772 KHz SYMBOL IZ JGEN PAMP PWBAL PABAL PLVL 12 2.5 3.0 1 10 MIN 95 TYP 100
(0C to 70C; VDD=5V 5%)
MAX 105 0.03 3.5 10 100 19 UNITS ohms UIpp Vpk ns mV dBm NOTES 1 2 3,4,5 3,6 3,6 7
NOTES:
1. RX+ and RX- left open circuited. 2. Jitter present at TXTIP and TXRING with no jitter at TCLK (LB=0) or LCLK (LB=1). 3. Measured with 100 ohm (5%) termination at TXTIP and TXRING. 4. Measured directly at TXTIP and TXRING with 0 dB of line build out. 5. Pulse shape meets template in Figure 3 over temperature and voltage. 6. Measured over 17 consecutive pulses. 7. Measured in a 2 KHz to 3 KHz band about 772 KHz; power level in a 2 to 3 KHz band at 1.544 MHz is at least 25 dB lower.
DIGITAL ELECTRICAL CHARACTERISTICS
PARAMETER TCLK Period TPOS, TNEG or LPOS, LNEG Setup Time to TCLK or LCLK Falling TPOS, TNEG or LPOS, LNEG Hold Time from TCLK or LCLK Falling SYMBOL tP tSD 50 MIN TYP
(0C to 70C; VDD=5V 5%)
MAX 32 UNITS ppm ns NOTES 1
tHD
50
ns
NOTE:
1. Necessary to meet current carrier and FCC specifications.
AC TIMING DIAGRAM Figure 5
TCLK LCLK tSD TPOS, TNEG LPOS, LNEG tHD
tP
022798 8/9
DS2290
DS2290 T1 ISOLATION Stik
P SIDE B SIDE A O N
A J B
C D E
G H I
F
PKG DIM A IN. B IN. C IN. D IN. E IN. F IN. G IN. H IN. I IN. J IN. N IN. O IN. P IN. 30-PIN MIN 3.455 3.229 0.845 0.395 0.245 MAX 3.505 3.239 0.855 0.405 0.255
0.100 BSC 0.075 0.295 0.085 0.305
2.900 BSC 0.120 0.130 0.235 0.100 0.054
022798 9/9


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